{"containers": {"cna": {"affected": [{"product": "Xen", "vendor": "Xen", "versions": [{"lessThan": "4.12", "status": "unknown", "version": "unspecified", "versionType": "custom"}]}], "credits": [{"lang": "en", "value": "{'credit_data': {'description': {'description_data': [{'lang': 'eng', 'value': 'This issue was discovered by Jann Horn of Google Project Zero.'}]}}}"}], "descriptions": [{"lang": "en", "value": "x86: Speculative vulnerabilities with bare (non-shim) 32-bit PV guests 32-bit x86 PV guest kernels run in ring 1. At the time when Xen was developed, this area of the i386 architecture was rarely used, which is why Xen was able to use it to implement paravirtualisation, Xen's novel approach to virtualization. In AMD64, Xen had to use a different implementation approach, so Xen does not use ring 1 to support 64-bit guests. With the focus now being on 64-bit systems, and the availability of explicit hardware support for virtualization, fixing speculation issues in ring 1 is not a priority for processor companies. Indirect Branch Restricted Speculation (IBRS) is an architectural x86 extension put together to combat speculative execution sidechannel attacks, including Spectre v2. It was retrofitted in microcode to existing CPUs. For more details on Spectre v2, see: http://xenbits.xen.org/xsa/advisory-254.html However, IBRS does not architecturally protect ring 0 from predictions learnt in ring 1. For more details, see: https://software.intel.com/security-software-guidance/deep-dives/deep-dive-indirect-branch-restricted-speculation Similar situations may exist with other mitigations for other kinds of speculative execution attacks. The situation is quite likely to be similar for speculative execution attacks which have yet to be discovered, disclosed, or mitigated."}], "metrics": [{"other": {"content": {"description": {"description_data": [{"lang": "eng", "value": "A malicious 32-bit guest kernel may be able to mount a Spectre v2 attack\nagainst Xen, despite the presence hardware protections being active.\n\nIt therefore might be able to infer the contents of arbitrary host memory,\nincluding memory assigned to other guests."}]}}, "type": "unknown"}}], "problemTypes": [{"descriptions": [{"description": "unknown", "lang": "en", "type": "text"}]}], "providerMetadata": {"dateUpdated": "2021-06-11T14:53:06", "orgId": "23aa2041-22e1-471f-9209-9b7396fa234f", "shortName": "XEN"}, "references": [{"tags": ["x_refsource_MISC"], "url": "https://xenbits.xenproject.org/xsa/advisory-370.txt"}], "x_legacyV4Record": {"CVE_data_meta": {"ASSIGNER": "security@xen.org", "ID": "CVE-2021-28689", "STATE": "PUBLIC"}, "affects": {"vendor": {"vendor_data": [{"product": {"product_data": [{"product_name": "Xen", "version": {"version_data": [{"version_affected": "?<", "version_value": "4.12"}]}}]}, "vendor_name": "Xen"}]}}, "configuration": {"configuration_data": {"description": {"description_data": [{"lang": "eng", "value": "Systems running all versions of Xen are affected.\n\nOnly x86 systems are vulnerable, and only CPUs which are potentially\nvulnerable to Spectre v2. Consult your hardware manufacturer.\n\nThe vulnerability can only be exploited by 32-bit PV guests which are not\nrun in PV-Shim."}]}}}, "credit": {"credit_data": {"description": {"description_data": [{"lang": "eng", "value": "This issue was discovered by Jann Horn of Google Project Zero."}]}}}, "data_format": "MITRE", "data_type": "CVE", "data_version": "4.0", "description": {"description_data": [{"lang": "eng", "value": "x86: Speculative vulnerabilities with bare (non-shim) 32-bit PV guests 32-bit x86 PV guest kernels run in ring 1. At the time when Xen was developed, this area of the i386 architecture was rarely used, which is why Xen was able to use it to implement paravirtualisation, Xen's novel approach to virtualization. In AMD64, Xen had to use a different implementation approach, so Xen does not use ring 1 to support 64-bit guests. With the focus now being on 64-bit systems, and the availability of explicit hardware support for virtualization, fixing speculation issues in ring 1 is not a priority for processor companies. Indirect Branch Restricted Speculation (IBRS) is an architectural x86 extension put together to combat speculative execution sidechannel attacks, including Spectre v2. It was retrofitted in microcode to existing CPUs. For more details on Spectre v2, see: http://xenbits.xen.org/xsa/advisory-254.html However, IBRS does not architecturally protect ring 0 from predictions learnt in ring 1. For more details, see: https://software.intel.com/security-software-guidance/deep-dives/deep-dive-indirect-branch-restricted-speculation Similar situations may exist with other mitigations for other kinds of speculative execution attacks. The situation is quite likely to be similar for speculative execution attacks which have yet to be discovered, disclosed, or mitigated."}]}, "impact": {"impact_data": {"description": {"description_data": [{"lang": "eng", "value": "A malicious 32-bit guest kernel may be able to mount a Spectre v2 attack\nagainst Xen, despite the presence hardware protections being active.\n\nIt therefore might be able to infer the contents of arbitrary host memory,\nincluding memory assigned to other guests."}]}}}, "problemtype": {"problemtype_data": [{"description": [{"lang": "eng", "value": "unknown"}]}]}, "references": {"reference_data": [{"name": "https://xenbits.xenproject.org/xsa/advisory-370.txt", "refsource": "MISC", "url": "https://xenbits.xenproject.org/xsa/advisory-370.txt"}]}, "workaround": {"workaround_data": {"description": {"description_data": [{"lang": "eng", "value": "Running 32-bit PV guests under PV-Shim avoids the vulnerability when Spectre v2\nprotections are otherwise enabled on the system.\n\nPV shim is available and fully security-supported in all\nsecurity-supported versions of Xen. Using shim is the recommended\nconfiguration.\n\nNot running 32-bit PV guests avoids the vulnerability."}]}}}}}}, "cveMetadata": {"assignerOrgId": "23aa2041-22e1-471f-9209-9b7396fa234f", "assignerShortName": "XEN", "cveId": "CVE-2021-28689", "datePublished": "2021-06-11T14:53:06", "dateReserved": "2021-03-18T00:00:00", "dateUpdated": "2021-06-11T14:53:06", "state": "PUBLISHED"}, "dataType": "CVE_RECORD", "dataVersion": "5.0"}

{"configurations": [{"nodes": [{"cpeMatch": [{"criteria": "cpe:2.3:o:xen:xen:*:*:*:*:*:*:*:*", "matchCriteriaId": "11A4C565-17B6-4CE1-B170-BD0D19F08CE5", "versionEndExcluding": "4.12.0", "vulnerable": true}], "negate": false, "operator": "OR"}]}], "descriptions": [{"lang": "en", "value": "x86: Speculative vulnerabilities with bare (non-shim) 32-bit PV guests 32-bit x86 PV guest kernels run in ring 1. At the time when Xen was developed, this area of the i386 architecture was rarely used, which is why Xen was able to use it to implement paravirtualisation, Xen's novel approach to virtualization. In AMD64, Xen had to use a different implementation approach, so Xen does not use ring 1 to support 64-bit guests. With the focus now being on 64-bit systems, and the availability of explicit hardware support for virtualization, fixing speculation issues in ring 1 is not a priority for processor companies. Indirect Branch Restricted Speculation (IBRS) is an architectural x86 extension put together to combat speculative execution sidechannel attacks, including Spectre v2. It was retrofitted in microcode to existing CPUs. For more details on Spectre v2, see: http://xenbits.xen.org/xsa/advisory-254.html However, IBRS does not architecturally protect ring 0 from predictions learnt in ring 1. For more details, see: https://software.intel.com/security-software-guidance/deep-dives/deep-dive-indirect-branch-restricted-speculation Similar situations may exist with other mitigations for other kinds of speculative execution attacks. The situation is quite likely to be similar for speculative execution attacks which have yet to be discovered, disclosed, or mitigated."}, {"lang": "es", "value": "x86: Vulnerabilidades especulativas con invitados PV de 32 bits desnudos (no shim) invitados de kernel PV de 32 bits x86 se ejecutan en el anillo 1. En el momento en que se desarroll\u00f3 Xen, esta zona de la arquitectura i386 se usaba raramente, por lo que Xen pudo usarla para implementar la paravirtualizaci\u00f3n, el novedoso enfoque de Xen para la virtualizaci\u00f3n. En AMD64, Xen tuvo que usar un enfoque de implementaci\u00f3n diferente, por lo que Xen no usa el anillo 1 para soportar invitados de 64 bits. Ahora que el foco est\u00e1 en los sistemas de 64 bits, y la disponibilidad de soporte de hardware expl\u00edcito para la virtualizaci\u00f3n, arreglar los problemas de especulaci\u00f3n en el anillo 1 no es una prioridad para las compa\u00f1\u00edas de procesadores. Indirect Branch Restricted Speculation (IBRS) es una extensi\u00f3n de la arquitectura x86 creada para combatir los ataques de canal lateral de ejecuci\u00f3n especulativa, incluido Spectre v2. Se ha adaptado en microc\u00f3digo a las CPU existentes. Para m\u00e1s detalles sobre Spectre v2, consulte:: http://xenbits.xen.org/xsa/advisory-254.html Sin embargo, IBRS no protege arquitect\u00f3nicamente el anillo 0 de las predicciones aprendidas en el anillo 1. Para m\u00e1s detalles, v\u00e9ase: https://software.intel.com/security-software-guidance/deep-dives/deep-dive-indirect-branch-restricted-speculation Pueden darse situaciones similares con otras mitigaciones para otros tipos de ataques de ejecuci\u00f3n especulativa. Es muy probable que la situaci\u00f3n sea similar para los ataques de ejecuci\u00f3n especulativa que a\u00fan no se han descubierto, divulgado o mitigado"}], "id": "CVE-2021-28689", "lastModified": "2023-08-08T14:21:49.707", "metrics": {"cvssMetricV2": [{"acInsufInfo": false, "baseSeverity": "LOW", "cvssData": {"accessComplexity": "LOW", "accessVector": "LOCAL", "authentication": "NONE", "availabilityImpact": "NONE", "baseScore": 2.1, "confidentialityImpact": "PARTIAL", "integrityImpact": "NONE", "vectorString": "AV:L/AC:L/Au:N/C:P/I:N/A:N", "version": "2.0"}, "exploitabilityScore": 3.9, "impactScore": 2.9, "obtainAllPrivilege": false, "obtainOtherPrivilege": false, "obtainUserPrivilege": false, "source": "nvd@nist.gov", "type": "Primary", "userInteractionRequired": false}], "cvssMetricV31": [{"cvssData": {"attackComplexity": "LOW", "attackVector": "LOCAL", "availabilityImpact": "NONE", "baseScore": 5.5, "baseSeverity": "MEDIUM", "confidentialityImpact": "HIGH", "integrityImpact": "NONE", "privilegesRequired": "LOW", "scope": "UNCHANGED", "userInteraction": "NONE", "vectorString": "CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:N/A:N", "version": "3.1"}, "exploitabilityScore": 1.8, "impactScore": 3.6, "source": "nvd@nist.gov", "type": "Primary"}]}, "published": "2021-06-11T15:15:11.187", "references": [{"source": "security@xen.org", "tags": ["Vendor Advisory"], "url": "https://xenbits.xenproject.org/xsa/advisory-370.txt"}], "sourceIdentifier": "security@xen.org", "vulnStatus": "Analyzed", "weaknesses": [{"description": [{"lang": "en", "value": "CWE-212"}], "source": "nvd@nist.gov", "type": "Primary"}]}

{}